Field
The present disclosure relates in general to the method and apparatus for de-embedding test fixtures to measure a device under test.
Description of the Related Art
Equipment such as Vector Network Analyzer (VNA) is used to measure the electrical behavior, in the form of scattering parameters (i.e., S parameters), of a device under test (DUT). The DUT can be a component such as a resistor, capacitor, or integrated circuit (IC), or can also be a cable or other electrical assembly. The DUT is usually mounted on or connected to a test fixture, such as printed circuit board (PCB) with coaxial connectors, so the entire assembly can be more conveniently connected to VNA through co-axial cables. The test fixture must be de-embedded in order to obtain data for the DUT itself.
Electrical behavior is expressed in scattering parameters or S parameters, which is measured by the VNA, software executed by the VNA, or other equipment configured to generate S parameters, depending on the desired implementation. Alternatively, S parameters can be stored in a touchstone file for analysis by a computer, server or other desired apparatus.
U.S. Pat. Nos. 7,019,535 and 7,157,918 use a “2× thru” structure for calibration. A “2× thru” structure corresponds to the test fixture in front of DUT cascaded with the mirror image of the same test fixture. One half of this “2× thru” structure is used to de-embed the test fixture. This one half of the 2× thru structure can also be further refined to de-embed the test fixture, depending on the desired implementation, as described, for example in “In-Situ De-embedding,” by Ching-Chao Huang, Electronic Design Innovation Conference (EDI CON), Beijing, China, April 2016.
U.S. Pat. No. 9,086,376 uses a “1× open” or “1× short” structure for calibration. The “1× open” structure resembles the test fixture in front of DUT, which may include coaxial connectors and PCB, but with one end close to DUT being left open (or floating). The “1× short” structure resembles the test fixture in front of DUT, which may include coaxial connectors and PCB, but with one end close to DUT being shorted to ground. Through time-gating, U.S. Pat. No. 9,086,376 uses “1× open” or “1× short” to reconstruct one half of “2× thru” for de-embedding. Time-gating is known to be prone to errors, however.